This invention relates to electromechanical systems and techniques for fabricating microelectromechanical and nanoelectromechanical systems; and more particularly, in one aspect, to fabricating or manufacturing microelectromechanical and nanoelectromechanical systems with high performance integrated circuits on a common substrate. and accelerometers, utilize micromachining techniques (i.e., lithographic and other precision fabrication techniques) to reduce mechanical components to a scale that is generally comparable to microelectronics. MEMS typically include a mechanical structure fabricated from or on, for example, a silicon substrate using micromachining techniques.
The mechanical structures are typically sealed in a chamber. The delicate mechanical structure may be sealed in, for example, a hermetically sealed metal container (for example, a TO-8 “can”, see, for example, U.S. Pat. No. 6,307,815) or bonded to a semiconductor or glass-like substrate having a chamber to house, accommodate or cover the mechanical structure (see, for example, U.S. Pat. Nos. 6,146,917; 6,352,935; 6,477,901; and 6,507,082). In the context of the hermetically sealed metal container, the substrate on, or in which, the mechanical structure resides may be disposed in and affixed to the metal container. The hermetically sealed metal container also serves as a primary package as well.
In the context of the semiconductor or glass-like substrate packaging technique, the substrate of the mechanical structure may be bonded to another substrate whereby the bonded substrates form a chamber within which the mechanical structure resides. In this way, the operating environment of the mechanical structure may be controlled and the structure itself protected from, for example, inadvertent contact. The two bonded substrates may or may not be the primary package for the MEMS as well.
MEMS that employ a hermetically sealed metal container or a bonded semiconductor or glass-like substrate to protect the mechanical structures tend to be difficult to cost effectively integrate with high performance integrated circuitry on the same substrate. In this regard, the additional processing required to integrate the high performance integrated circuitry, tends to either damage or destroy the mechanical structures.
Another technique for forming the chamber that protects the delicate mechanical structure employs micromachining techniques. (See, for example, International Published Patent Applications Nos. WO 01/77008 A1 and WO 01/77009 A1). In this regard, the mechanical structure is encapsulated in a chamber using a conventional oxide (SiO2) deposited or formed using conventional techniques (i.e., oxidation using low temperature techniques (LTO), tetraethoxysilane (TEOS) or the like). (See, for example, WO 01/77008 A1, FIGS. 2-4). When implementing this technique, the mechanical structure is encapsulated prior to packaging and/or integration with integrated circuitry.
While employing a conventional oxide to encapsulate the mechanical structures of the MEMS may provide advantages relative to hermetically sealed metal container or a bonded semiconductor or glass-like substrate, a conventional oxide, deposited using conventional techniques, often exhibits high tensile stress at, for example, corners or steps (i.e., significant spatial transitions in the underlying surface(s)). Further, such an oxide is often formed or deposited in a manner that provides poor coverage of those areas where the underlying surface(s) exhibit significant spatial transitions. In addition, a conventional oxide (deposited using conventional techniques) often provides an insufficient vacuum where a vacuum is desired as the environment in which the mechanical structures are encapsulated and designed to operate. These shortcomings may impact the integrity and/or performance of the MEMS. Moreover, a conventional oxide, deposited using conventional techniques, may produce a film on the mechanical structures during the encapsulation process. This film may impact the integrity of the mechanical structures and, as such, the performance or operating characteristics of the MEMS (for example, the operating characteristics of a resonator).
Additionally, conventional MEMS applications are limited to a range of materials that are compatible with silicon based materials. That is, current MEMS applications are constrained by the inability to utilize certain materials, other than silicon based and silicon compatible materials, for various functional layers of a MEMS application. For example, use of non-silicon based materials for a MEMS structure may cause cross contamination during subsequent processing steps, such as during epitaxial deposition and/or encapsulation steps. Materials such as piezoelectric aluminum nitride and other piezoelectric materials may be useful for MEMS applications, but are not currently utilized due to the concern of cross contamination and other potential adverse effects when implementing non-silicon base materials.
There is a need for, among other things, MEMS (for example, gyroscopes, resonators, temperature sensors and/or accelerometers) that (1) overcome one, some or all of the shortcomings of the conventional materials and techniques and/or (2) may be efficiently integrated on a common substrate with high performance integrated circuits and/or additional MEMS.
There are many inventions described and illustrated herein. In a first principal aspect, the present invention is a method of sealing a chamber of an electromechanical device having a mechanical structure disposed within the chamber. The method includes depositing a sacrificial layer over at least a portion of the mechanical structure and depositing a first encapsulation layer (for example, a polycrystalline silicon, amorphous silicon, germanium, silicon/germanium or gallium arsenide) over the sacrificial layer. At least one vent is formed through the first encapsulation layer, and at least a portion of the sacrificial layer is removed to form the chamber. Thereafter, a second encapsulation layer is deposited over or in the vent to seal the chamber wherein the second encapsulation layer is a semiconductor material (for example, polycrystalline silicon, amorphous silicon, silicon carbide, silicon/germanium, germanium, or gallium arsenide).
In one embodiment of this aspect of the invention, the first encapsulation layer is a semiconductor material that is doped with a first impurity to provide a first region of a first conductivity type, and the second encapsulation layer is doped with a second impurity to provide a second region with a second conductivity type. The first conductivity type is opposite the second conductivity type. In one embodiment, the first and second encapsulation layers are deposited using an epitaxial or a CVD reactor.
The method may also include planarizing an exposed surface of the second encapsulation layer and removing a sufficient amount of the second encapsulation layer to thereby expose the first encapsulation layer and provide junction isolation.
In one embodiment, a first portion of the first encapsulation layer is comprised of a monocrystalline silicon and a second portion is comprised of a polycrystalline silicon. In this embodiment, a surface of the second encapsulation layer may be planarized to expose the first portion of the first encapsulation. Thereafter, a monocrystalline silicon may be grown on the first portion of the first encapsulation.
In another principal aspect, the present invention is a method of manufacturing an electromechanical device having a mechanical structure that resides in a chamber. The chamber may include a fluid having a pressure that provides mechanical damping for the mechanical structure. The method comprises depositing a first encapsulation layer (comprised of a semiconductor material, for example, polycrystalline silicon, amorphous silicon, silicon carbide, silicon/germanium, germanium, or gallium arsenide) over the mechanical structure. At least one vent is then formed in the first encapsulation layer and the chamber is formed. Thereafter, a second encapsulation layer (comprised of a semiconductor material, for example, polycrystalline silicon, porous polycrystalline silicon, amorphous silicon, silicon carbide, silicon/germanium, germanium, or gallium arsenide) is deposited over or in the vent to seal the chamber.
In one embodiment of this aspect of the invention, the first encapsulation layer is doped with a first impurity to provide a first region of a first conductivity type, and the second encapsulation layer is doped with a second impurity to provide a second region with a second conductivity type. The first conductivity type is opposite the second conductivity type. The first and second encapsulation layers may be deposited using an epitaxial or a CVD reactor.
In one embodiment, a first portion of the first encapsulation layer is comprised of a monocrystalline silicon and a second portion is comprised of a polycrystalline silicon. In this embodiment, a surface of the second encapsulation layer may be planarized to expose the first portion of the first encapsulation. Thereafter, a monocrystalline silicon may be grown on the first portion of the first encapsulation.
In another principal aspect, the present invention is an electromechanical device comprising a chamber including a first encapsulation layer (for example, polycrystalline silicon, porous polycrystalline silicon, amorphous silicon, germanium, silicon/germanium, gallium arsenide, silicon nitride or silicon carbide), having at least one vent, and a mechanical structure having at least a portion disposed in the chamber. The electromechanical device also includes a second encapsulation layer comprised of a semiconductor material (for example, polycrystalline silicon, porous polycrystalline silicon, amorphous silicon, silicon carbide, silicon/germanium, germanium, or gallium arsenide), deposited over or in the vent, to thereby seal the chamber.
In one embodiment, the first encapsulation layer is a semiconductor material that is doped with a first impurity to provide a first region of a first conductivity type. The second encapsulation layer is doped with a second impurity to provide a second region with a second conductivity type. The first conductivity type is opposite the second conductivity type.
The device may also include a contact (i.e., a conductive region, such as the contact area and/or contact via, that is partially or wholly disposed outside of the chamber) disposed outside the chamber. The contact may be a semiconductor that is doped with impurities to increase the conductivity of the area. The contact may be surrounded by the semiconductor of the first conductivity type and the semiconductor of the second conductivity type, which, in combination, forms a junction isolation.
The device of this aspect of the present invention may include a first portion of the first encapsulation layer that is comprised of a monocrystalline silicon and a second portion is comprised of a polycrystalline silicon. In addition, the present invention may include a field region disposed outside and above the chamber wherein the field region is comprised of a monocrystalline silicon.
In one embodiment, the first portion of the first encapsulation layer may be comprised of a monocrystalline silicon and a second portion comprised of a porous or amorphous silicon. In this embodiment, the second encapsulation layer overlying the second portion of the first encapsulation layer is a polycrystalline silicon.
In another principal aspect, the present invention is an electromechanical device including a piezoelectric material.